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SN74HC20DR Integrated Circuit Chip , Dual 4 input NAND gate IC Electronic Components

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SN74HC20DR Integrated Circuit Chip , Dual 4 input NAND gate IC Electronic Components

Model Number : 74HC20D

Certification : new & original

Place of Origin : original factory

MOQ : 10pcs

Price : Negotiate

Payment Terms : T/T, Western Union, Paypal

Supply Ability : 8300pcs

Delivery Time : 1 day

Packaging Details : Please contact me for details

Description : NAND Gate IC 2 Channel 14-SOIC

propagation delay nA, nB, nC, nD to nY : 8 ns

input capacitance : 3.5 pF

power dissipation capacitance per package : 22 pF

Output capability : standard

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74HC20D Integrated Circuit Chip , Dual 4 input NAND gate IC Electronic Components

Dual 4-input NAND gate 74HC/HCT20

FEATURES

• Output capability: standard

• I_CC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function.

QUICK REFERENCE DATA

GND = 0 V; T_amb = 25 °C; t_r= t_f = 6 ns

SYMBOL	PARAMETER	CONDITIONS	TYPICAL		UNIT
SYMBOL	PARAMETER	CONDITIONS	HC	HCT	UNIT
t_PHL/ t_PLH	propagation delay nA, nB, nC, nD to nY	C_L = 15 pF; V_CC = 5 V	8	13	ns
C_I	input capacitance		3.5	3.5	pF
C_PD	power dissipation capacitance per package	notes 1 and 2	22	17	pF

Notes

1. C_PD is used to determine the dynamic power dissipation (P_D in µW):

P_D = C_PD × V_CC² × f_i + ∑ (C_L × V_CC² × f_o) where:

f_i= input frequency in MHz

f_o = output frequency in MHz

C_L = output load capacitance in pF

V_CC = supply voltage in V

∑ (C_L × V_CC² × f_o) = sum of outputs

2. For HC the condition is V_I = GND to V_CC

For HCT the condition is V_I= GND to V_CC − 1.5 V

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